Guest Editorial - Selected Papers from the 2013 IEEE International Solid-State Circuits Conference (ISSCC)

T HE IEEE International Solid-State Circuits Conference (ISSCC) is the flagship conference of the IEEE Solid-State Circuits Society and the foremost global forum for presenting advances in solid-state circuits and systems-on-a-chip. From 2010–2012, the IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS has highlighted selected papers from ISSCC on topics related to biological and healthcare applications. This special issue once again features six selected pa-This set of papers offers a sample of the rapidly expanding developments in solid-state circuits for health monitoring, ther-apeutics, diagnostics, and medical research applications. The selection of these papers, whose final decision was based on a thorough peer review process, was coordinated with the Editor in Chief of the IEEE JOURNAL OF SOLID-STATE CIRCUITS (JSSC), Prof. Michael Flynn, to avoid overlap with its ISSCC 2013 special issue, which will include biomedical papers as well. and the Institute of Microelectronics from Singapore, entitled " A 0.45 V 100-Channel Neural-Recording IC with Sub-Consumption in 0.18 CMOS, " employs system-level optimizations , a dynamic range folding technique, and circuit-level innovations to realize a high-density neural recording IC prototype. Implemented in 0.18 CMOS, the chip features 100 channels, each having an input-referred noise of 3.2 , all in a die which represents state-of-the-art performance for next-generation neural recording applications. The paper from M. Monge et al. out of Caltech, the University of Southern California and the Doherty Eye Institute, presents a wireless integrated circuit for next-generation retinal implants. The chip contains capability for wireless powering and communication, and utilizes several innovative techniques for high-efficiency RF-DC conversion, and high-density, arbitrary -waveform electrode driver design. 512 stimulating channels with 1% current imbalance and RF circuits are integrated in a 4.5 3.1 mm chip. The RF powering subsystem is capable of delivering 25 mW at 80% conversion efficiency, while the downward telemetry transfers data at a rate of 80 Mbps. The paper by Y.-K. Lo et al. from the University of Cali-fornia, Los Angeles, entitled " A Fully-Integrated High-Compliance Voltage SoC for Epi-retinal and Neural Prostheses, " describes a system-on-chip featuring wireless powering, data telemetry, and protocol control, integrated together with 1024 stimulation channels. Fabricated in a high voltage 0.18 CMOS process, the chip occupies an area of and has an output voltage compliance of 10 V. Importantly, the authors have validated the design in both in-vitro and in-vivo environments, illustrating promising directions for both artificial retina and general purpose neural stimulation applications. The …